Multialphabet Arithmetic Coding at 16 MBytes/sec

We present the design and performance of a non-adaptive hardware system for data compression by arithmetic coding. The alphabet of the data source is the full 256-symbol ASCII character set, plus a non-ASCII end-ofle symbol. The key ideas of our system are the non-arithmetic representation of the current interval width, which yields improved coding e ciency in the interval-width update, and a retimed circuit for the code point update, which removes this step from the critical path of the system's operation. Through a further retiming, the lower bound on this circuit's clock period can be reduced to a constant, independent of its width in bits. We have implemented and tested the system on a recon gurable coprocessor, which is constructed from commercially available eld-programmable gate arrays and static RAM. This implementation compresses its input stream at better than 16 MBytes/sec.